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00:04:30

Intel® Agilex™: Acceleration from Edge to Cloud

Learn how Intel® Agilex™ FPGAs and SoCs combine the power of heterogeneous architecture, transcei...

00:01:20

Intel® Agilex™ FPGAs and SoCs – Innovation for the Data Era

Intel’s 10nm technology based Intel® Agilex™ FPGAs and SoCs combine agility and flexibility to de...

00:02:16

Rambus Labs Hybrid Memory Research Platform

Developed in partnership with IBM, Xilinx, Alpha Data, and Wistron, the Rambus Labs Hybrid Memory...

00:06:27

Using System Generator for DSP for Zynq UltraScale+ RFSoC

Learn about the new Super Sample Rate block set in the 2018.3 release of Vivado System Generator ...

00:26:14

Getting Started with the Intel® Distribution of OpenVINO™ toolkit with FPGAs

The Intel® Distribution of OpenVINO™ toolkit along with its subcomponent the Intel® FPGA Deep Lea...

00:17:42

Low-Density Parity-Check (LDPC) Codes Intel® FPGA IP for 5G Systems

As wireless vendors begin to deploy 5G-based technology, Low-Density Parity-Check (LDPC) codes ar...

00:17:24

Configuring the Intel® Stratix® 10 FPGA E-Tile Hard IP for Ethernet

This online course will introduce the IP core used to customize the Hard IP for Ethernet block fo...

00:09:55

Getting started with Intel PAC with Intel A10 GX FPGA

The purpose of this video is to introduce Intel Acceleration Stack users to the basics of the pro...

00:04:56

AIRRAYS Massive MIMO Antenna Reference Design on Zynq UltraScale+ RFSoC

AIRRAYS Massive MIMO Antenna Reference Design on Zynq UltraScale+ RFSoC as demonstrated at MWC 2019.

00:11:51

BSP Getting Started

This video will describe how to get started looking into the OpenCL board support package that is...

00:31:46

Using the Intel Quartus Prime Pro Edition Synthesis Engine

The Intel® Quartus® Prime Pro Edition software is designed to take your advanced FPGA designs to ...

00:28:28

SignalTap II Logic Analyzer: Introduction & Getting Started

This training is part 1 of 4. The SignalTap® II embedded logic analyzer (ELA) is a system-level d...

00:24:12

Intel® Stratix® 10 FPGA Optimization: Loop Analysis and Solutions

Are you targeting a Stratix® 10 HyperFlex™ device and wanting to learn how your design can reach ...

00:11:04

LittleBee GW1NS-2 Embedded pSRAM and CPLD with Cortex-M3

LittleBee GW1NS-2 Embedded sRAM and CPLD with Coretex-M3에 대해 소개합니다. www.gowinsemi.com

00:35:17

Power Analysis

This is part 1 of 2. Designing for low-power in today’s high-speed FPGA designs is more important...

00:24:22

Incremental Optimization with the Intel Quartus Prime Pro Edition Software

In this training, you will learn about the incremental optimization and per-stage compilation fea...

00:01:27

Mipsology Demonstrates Zebra: the High-performance Deep Learning Computation Engine

Mipsology develops state-of-the-art FPGA-based computation engines for Deep Learning inference. I...

00:23:08

Creating Custom Primitives for the Intel® FPGA Deep Learning Acceleration Suite

The Intel® FPGA Deep Learning Acceleration (DLA) Suite provides users with the tools and optimize...

00:23:23

Using the Generic Serial Flash Interface

The Generic Serial Flash Interface (GSFI) is a core that can communicate with any QSPI type flash...

00:22:21

Building an RTL Module for the Intel® FPGA SDK for OpenCL™

This online training will introduce the learner to building RTL (Verilog, SystemVerilog, or VHDL)...